The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing are needed. For example, extreme ultraviolet lithography (EUVL) is often implemented to provide a higher resolution lithography process. Mask sets used in EUV (and other high-resolution) lithography presents new challenges. For example, some EUV masks will include an absorption layer. When etching the absorption layer, it is important to provide reduced process disturbance and reduced particle generation. It is desired to have improvements in this area.